Programmable Active Memories: Recon gurable Systems Come of Age

|Programmable Active Memories (PAM) are a novel form of universal recon gurable hardware co-processor. Based on Field-Programmable Gate Array (FPGA) technology, a PAM is a virtual machine, controlled by a standard microprocessor, which can be dynamically and inde nitely recongured into a large number of application-speci c circuits. PAMs o er a new mixture of hardware performance and software versatility. We review the important architectural features of PAMs, through the example of DECPeRLe-1, an experimental device built in 1992. PAM programming is presented, in contrast to classical gate-array and full custom circuit design. Our emphasis is on large, code-generated synchronous systems descriptions; no compromise is made with regard to the performance of the target circuits. We exhibit a dozen applications where PAM technology proves superior, both in performance and cost, to every other existing technology, including supercomputers, massively parallel machines, and conventional custom hardware. The elds covered include computer arithmetic, cryptography, error correction, image analysis, stereo vision, video compression, sound synthesis, neural networks, high-energy physics, thermodynamics, biology and astronomy. At comparable cost, the computing power virtually available in a PAM exceeds that of conventional processors by a factor 10 to 1000, depending on the speci c application, in 1992. A technology shrink increases the performance gap between conventional processors and PAMs. By Noyce's law, we predict by how much the performance gap will widen with time. Keywords|Programmable Active Memory, PAM, recongurable system, eld-programmable gate array, FPGA.